1. Field of the Invention
The present invention relates to power processors in general, and more specifically to a power pulse switching circuit of common base configuration for use therein.
2. Description of the Prior Art
Although the switching speed of power-pulse switching circuits, circuits for conducting a relatively large current between a pair of terminals for a predetermined period of time in response to a triggering signal, is of considerable moment, the switching speed of such circuits is of particular concern when such circuits are employed in prior art power processors. Such prior art power processors include those which are known in the art as bucking regulators, boost regulators, converters and inverters.
Bucking regulators develop from a potential source a reduced-level regulated potential for use by a load. A typical bucking regulator includes a switching circuit, such as a power-pulse switching circuit, connected between the potential source and a first node and an inductive element connected between the first node and the load, the combination for selectively coupling current from the source to the load. Also included is an error amplifier having a pair of inputs connected so as to compare the potential developed across the load, or a derivative thereof, with a reference potential for developing an error signal and a generator connected between the output of the error amplifier and the switching circuit for selectively triggering the switching circuit responsive to the error signal. Finally, a filter capacitor connected across the load and a circulating diode, or a load-line-correcting circuit including a circulating diode, connected from the first node to a node common to the source and load are also included.
A load-line-correcting circuit is employed to reduce the power dissipated by the switching circuit by preventing the switching circuit from switching the full operating potential while conducting the full operating current. In other words, ideally, the load-line-correcting circuit prevents a substantial current from flowing through the switching circuit until the potential across the switching circuit has been substantially reduced when the switching circuit is turning on. Additionally, the load-line-correcting circuit substantially reduces the current flow through the switching circuit before the potential across the switching circuit has been substantially increased when the switching circuit is turning off. A number of non-dissipative load-line-correcting circuits are described in the article which is entitled "Designing Non-Dissipative Current Snubbers For Switching Mode Converters" authored by Eugene C. Whitcomb and published in the proceedings of the Sixth National Solid-State Power Conversion Conference dated May 1979 starting on page B1.
If the positions of the power pulse switching circuit, the inductive element and the diode of the bucking regulator are rearranged, the resultant configuration, called a boost regulator, is operative to develop from a potential source an increased-level regulated potential for use by the load. Specifically, the inductive element is connected between the potential source and the first node. The diode is connected between the first node and the load, and the switching circuit is connected between the first node and the common node.
Should the inductive element, which may be thought of as a one-to-one auto-transformer, of the boost regulator, be replaced by the primary winding of a transformer having a secondary winding across which the diode, capacitor and the load are connected such that the diode is in series with the parallel combination of the capacitor and the load, the power processor is known as a DC-to-DC converter. Finally, if the load is connected directly across the secondary of the transformer, the power processor is of the type which is known as a DC-to-AC inverter. For a description of various configurations of prior art power processors and an analysis of the configurations which leads to the conclusion that the various configurations are equivalent, the reader is referred to the article entitled "Unifying Derivation of Switching Regulator Topologies", authored by E. E. Landsman and published in the IEEE Power Electronics Specialists Conference Record of June 1979; the article entitled "Techniques for Designing New Types of Switching Regulators", authored by Rudy Severns and published in the European Power Conversion Conference Record of September 1979; and "A Review of Switch Mode Converter Technology", by Rudy Severns, Intersil Application Note A035, February 1980.
Of particular importance is the frequency at which a power processor is operated. When the operating frequency is increased, the size of both the inductive elements and the filter capacitors may be reduced, decreasing the size, weight and cost of the power processor. A limitation upon the operating frequency of a power processor is imposed by the switching speed, the turn-on and turn-off rates, of the associated switching circuit. Besides the direct limitation, a practical limitation upon the operating frequency of a power processor may be imposed by the total power dissipation of the switching circuit, which often is principally the result of power dissipated during the period when the circuit is in transition, turning on or turning off.
One prior-art power pulse switching circuit which exhibits a particularly low level of power dissipation and a fast switching rate includes a bipolar transistor operated in a commonemitter mode and a saturable core current transformer having a pair of windings. The transistor, which switches current between a pair of terminals, has an emitter connected to a first one of the terminals, a collector coupled to the other terminal by one of the transformer windings and a base coupled to the first terminal by the other transformer winding. The turns ratio of the collector and base windings of the current transformer provide current feedback for the transistor establishing a forced transistor beta at a value which approximates the turns ratio. The circuit additionally includes means for initiating conduction of the transistor in response to the triggering signal and means for resetting the transformer core following each pulse.
Another prior-art power-pulse switching circuit differs from the above-mentioned circuit in that the transistor is operated in a common-collector configuration. The transistor has an emitter coupled to the first terminal by one of the windings, or a portion of a single center tapped winding, a base coupled either to the emitter or the first terminal by the other winding, or the other portion of the center tapped winding, and a collector connected to the other terminal.
The above two prior-art circuits are particularly advantageous in that they employ proportional feedback, the base drive being derived directly from the power flow itself. Thus, for light loads, the base drive is reduced increasing the circuit efficiency. Additionally, the lower base drive produces fewer stored carriers improving the rate at which the circuit turns off.
Unfortunately, the disparity in the number of turns comprising the collector or emitter winding and the base winding of the current transformer employed in these prior-art circuits makes it difficult to wind the transformer so as to have a low value of leakage inductance. The transformer leakage inductance along with the parasitic capacitance of the transformer and the feed-through capacitance of the transistor all tend to degradate the rate with which these circuits turn-on and turn-off. Further it has been found that the optimum turn-on and turn-off rate may be achieved when there is a minimum of resistance in series with the base. Thus, the base winding, by being in series with the base, tends to further degradate the rate with which the transistor turns on and turns off.
Finally, it has been found that the optimal turn-off rate may be achieved when, at turn-off time, all of the collector current is diverted from the emitter to the base to sweep out stored charge. Additional current tends to degradate the turn-off rate in that it comes from emitter-base junction avalanche breakdown which tends to produce additional stored charge. Although, in both of these prior art circuits, a portion of the collector current is diverted to the base at turn-off time, the transformer leakage inductance and parasitic capacitance limits the magnitude of the diverted current preventing an optimal turn-off rate from being achieved.
Limitations of the above-described prior-art power pulse switching circuits are discussed in an article entitled "A New Improved And Simplified Proportional Base Drive Circuit" authored by Rudy Severns and published in the proceedings of the Sixth National Solid-State Power Conversion Conference dated May 1979 beginning on page B2.
Also of interest is the article authored by the application entitled "A High Speed Proportional Feedback Switching Circuit" published in the January/February 1979 issue of "Solid-State Power Conversion" beginning on page 9.